1. Field of the Invention
The invention relates to semiconductor integrated circuits and more particularly to an on-chip inductor with multi-trace structure.
2. Description of the Related Art
Many digital and analog elements and circuits have been successfully applied to semiconductor integrated circuits. Such elements may include passive components, such as resistors, capacitors, or inductors. Typically, a semiconductor integrated circuit includes a silicon substrate. One or more dielectric layers are disposed on the substrate, and one or more metal layers are disposed in the dielectric layers. The metal layers may be employed to form on-chip elements, such as on-chip inductors, by current semiconductor technologies.
Conventionally, an on-chip inductor is formed over a semiconductor substrate and employed in integrated circuits designed for the radio frequency (RF) band. FIGS. 1A and 1B illustrate a plan view of a conventional on-chip inductor with a planar spiral configuration and a cross-section along 1B-1B′ line shown in FIG. 1A, respectively. The on-chip inductor is formed in a dielectric layer 104 on a substrate 100, comprising a spiral conductive trace 103 and an interconnect structure. The spiral conductive trace 103 is embedded in the dielectric layer 104. The interconnect structure includes conductive plugs 105 and 109 and a conductive trace 107 embedded in a dielectric layer 102 and a signal output/input conductive trace 111 embedded in the dielectric layer 104. The dielectric layer 102 is disposed between the dielectric layer 104 and the substrate 100. An internal circuit of the chip or an external circuit may provides a current passing through the coil, which includes the conductive trace 103, the conductive plugs 105 and 109, the conductive trace 107, and the signal output/input conductive trace 111.
A principle advantage of the planar spiral inductor is the increased level of circuit integration due to the reduced number off-chip circuit elements and the complex interconnections required thereby. Moreover, the planar spiral inductor can reduce parasitic effect induced by the bond pads or bond wires between on-chip and off-chip circuits.
As integrated circuit (IC) designs have progressed, there has been an increased interest in integrating several different functions on a single chip while minimizing process complexity and any resulting impact on manufacturing yield. This integration of several different functions on a single chip is known as system on chip (SOC). Additionally, with the rapid development of communication systems, an SOC typically includes radio frequency (RF) circuits and digital or baseband circuits. Since the RF circuits in an SOC are smaller than the digital or baseband circuits, chip fabrication employs a digital or baseband circuit process. Accordingly, inductor traces in SOC are thinner compared to the inductors of general RF circuits, resulting reduced quality factor (Q value).
Since the performance of integrated circuit devices is based on the Q value of the on-chip inductors, there is a need to develop an on-chip inductor with increased Q value.